[time-nuts] Harmonics suppression in ring oscillators
Florian Teply
usenet at teply.info
Wed Mar 18 16:19:55 EDT 2015
Am Wed, 18 Mar 2015 09:23:27 +0100
schrieb Attila Kinali <attila at kinali.ch>:
> On Tue, 17 Mar 2015 22:04:49 +0100
> Florian Teply <usenet at teply.info> wrote:
>
> > funnily I stumbled across that very question just a few weeks ago
> > while doing my very first ring oscillator designs myself.
>
> Good, I am not alone.. I felt stupid not being able to find something
> this basic.
>
Maybe we are stupid not being able to find something this basic, but
then we're stupid together, so at least we have company ;-)
> > The explanation I have come to is essentially the following: In
> > principle, you're right, a ring oscillator CAN oscillate at a
> > number of frequencies. Given the way the ring oscillator works, the
> > list of possible fundamental frequencies (not considering the
> > spectrum due to the rectangular waveform with some duty cycle) is
> > essentially given by (1+2k)/(2*n*td), with n being the number of
> > stages (odd integer), td being the time delay of one stage
> > (assuming all stages are identical), and k being any integer
> > between 0 and (n-1)/2.
>
> Hm.. so only odd harmonics? What prevents the even harmonics?
Now you got me thinking...
Based on my train of thought of yesterday, the prevention of even
harmonics is caused by the need of an odd number of stages. Now as I
rethink about it I'm no longer sure that there couldn't possibly any
even harmonic. From what it seems to me now, it doesn't even need to
have an odd number of stages, it just happens to need to have an odd
number of INVERTING stages for it to self-start oscillation reliably.
If I'm not mistaken - which apparently could be a reasonable
assumption - , any chain of elements that can be formed into a closed
loop can be made to oscillate if a signal is injected somehow.
Let's try an experiment of thought, using the smallest possible chain
of even number of elements: 2 inverters connected in a feedback loop.
Assuming they are in a stable condition: logic 0 at one node, logic 1
at the other. Looks pretty much like an SRAM cell without the access
transistors...
Anyways, if one injects a transient change on any of these two nodes,
it will propagate to the other node. Unfortunately, this is a bad
example as an injected change needs to be approximately one gate delay
in duration or longer in order to be able to propagate indefinitely,
yet if it is longer than one gate delay, it will stabilize the state of
the circuit such that there is no oscillation.
Now, assume a 4 stage inverter loop. If it powers up in a stable
configuration, it will stay in that state unless anything else happens,
just like the 2-stage inverter chain above. If we manage to inject a
state flip for any period between 1 and 3 gate delays - at this point
we don't care how we manage to do that -, we will have two transitions
that will happily propagate through the chain indefinitely. Shorter
than one gate delay and it will be extinguished after a while
settling back to the original state, longer than 3 gate delays and it
also will be extinguished, settling to the inverted original state.
For the sake of argument, it doesn't matter if the stages are inverting
or not as the total saturated loop gain will be 1 in any case. It just
happens that in CMOS logic an inverter is the simples thing one can
have, short of passive devices.
In order to visualize it, here's a logic chart:
Inverting Non-Inverting
Initial: 0101 0000
Injection: 0111 0010
Inj.+1td: 0100 0001
Inj.+2td: 1101 1000
Inj.+3td: 0001 0100
Inj.+4td: 0111 0010
Inj.+5td: 0100 0001
I guess you can extend that if necessary, but it should have become
clear that the injected bit flip actually triggered oscillation, even
though the saturated loop gain is +1 and not -1.
Still, for any ringoscillator to reliably start oscillation without
external trigger, a saturated loop gain of -1 is mandatory.
>
> > The trick here is to have one element in the chain that can be used
> > to create a steady internal state from which oscillation can be
> > started predictably. In the 11 stage ring oscillator mentioned
> > above, that might be a NAND or NOR gate together with 10 inverters.
> > With one input of that NAND or NOR being tied to the output of the
> > chain and the other one being tied to a reset input, which can be
> > used to enable or disable oscillation. A steady state would be
> > reached within 11 gate delays in the sample oscillator mentioned
> > above after DISABLING oscillation. One oscillation is reenabled, it
> > will ONLY oscillate at 1/(22*td).
>
> Ok, so you are saying, that if you start the ring oscillator
> in the right way, you get only the fundamental mode. What prevents
> higher modes from apearing during runtime? What happens if a particle
> passes trough the oscillator and switches one of the transistors?
>
Well, assuming that we are talking about sane environments (which your
mentioning of particle strikes basically renders null and void,
pointing to either high energy physics or space applications which can
not be considered sane in this context due to their posssibility to
switch logic states in circuits), all possible causes of introduction of
higher order oscillation are excluded by definition ;-)
Joking aside, the case that one cell is switched should be covered
above.
So, If you really need to cover all possible effects, low pass
filtering is your friend. At least there's one octave separation
between fundamental and first higher order mode, leaving sufficient
separation even after degradation due to radiation effects and/or
ageing or simply process variation.
>
> > Does that answer your question? Most likely it answered one and
> > turned up three more ;-)
>
> Oh.. I have many questions! Too many actually ^^;
> Is there any good literature on ring oscillators? I have not been able
> to find anything substantial yet. It's just papers and books that
> highlight one particluar feature, but nothing else.
>
Umm, I can't think of any good literature either. But I haven't dug
very deep though. Most of what I've written above actually is the
result of me thinking about how this could possibly work. So any
statement or idea not in line with reality clearly is my fault.
> BTW: Depending on how this project goes, we might work toghether with
> IHP on it. So I might potentially come over to Frankfurt....
>
Hmm, I'm already mentally sorting the list of past and potential
project partners to see where this might lead. In any case, should you
come close to Frankfurt (or Berlin for that matter), notify me so we can
have a beer together. If it's on my boss, even better ;-)
Florian Teply
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