[time-nuts] Digital Phasae Lock Loops

Bill Reed breed at otelco.net
Fri Oct 16 23:21:30 EDT 2015


I also knew Dr. Gardner in that time frame. I had the responsibility
for the specification and procurement of the Saturn V com system.
It included a phase locked turn around offset transponder for Doppler
tracking.
Also forward command and return telemetry. To gain some knowledge
of phase locked systems I contracted Dr. Gardner to conduct a course
on phase locked techniques at MSFC. This course became the basis
for his book. He gave me a signed copy.

Bill Reed

-----Original Message----- 
From: Alexander Pummer
Sent: Friday, October 16, 2015 7:05 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Digital Phasae Lock Loops

yes as I wrote Dr. Gardner is the pope of the phase locked loops, his
book is a heavy weight, not for beginner
73
Alex
10/16/2015 4:16 PM, Dave Daniel wrote:
> Wasn't Dr. Gardner the author of "the other" PLL book? Or am I confusing
> his name with another Gardner?
> <br>
> <br>DaveD
> <br>
> <br>On 10/16/2015 4:33 PM, Alexander Pummer wrote:
> <br><blockquote type=cite>actually my old friend Dr. Floyd Gardner -- 
> who is the pope of the
> phase locked loops -- told me some thirty years ego , that the Best
> book os a very good introduction
> <br>73
> <br>Alex
> <br>
> <br>On 10/16/2015 1:42 PM, Dave Daniel wrote:
> <br><blockquote type=cite>Roland Best's text is the best (no pun intended) 
> one I have seen on
> PLLs. I didn't know it was up to a sixth edition.
> <br>
> <br>On 10/16/2015 11:18 AM, Alexander Pummer wrote:
> <br><blockquote type=cite>Hi Steve,
> <br>I will tell you a big secret; a digital PLL is not a low phase noise
> system and a very good introduction to PLLs and the digital PLL
> could be found in Roland Bests:
> <br>
> <br>
> <br> Phase Locked Loops 6/e: Design, Simulation, and Applications
> <br>
> <br>73
> <br>KJ6UHN
> <br>Alex
> <br>
> <br>
> <br>On 10/16/2015 7:45 AM, Martyn Smith wrote:
> <br><blockquote type=cite>Hello,
> <br>
> <br>I want to design a digital phase lock loop.
> <br>
> <br>I intend to lock a 10 MHz ultra low noise oscillator that we make
> to an external frequency standard.
> <br>
> <br>I need a digital PLL as I’m trying to get a loop bandwidth < 0.1 
> Hz.
> <br>
> <br>Has anyone had any experience of Digital PLL’s or can point me to
> any documents published?
> <br>
> <br>Regards
> <br>
> <br>Steve
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