[time-nuts] Unified VCXO Carrier Board

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Oct 24 16:21:04 EDT 2015


On Saturday, October 24, 2015 09:03:21 AM Charles Steinmetz wrote:
> Bruce wrote:
> >The comparator circuit measured was the front end of David 
Partridge's
> >divider. I merely measured the 10MHz output.
> 
> The MAX999 and ADCMP600 are the two comparator options noted on
> David's schematic.  Both parts suffer from a number of the design and
> die-level issues I noted in my previous message, and I have never
> obtained particularly good PN with either one.  Also, even the
> relatively direct path to the 10MHz output goes through two 'AC04
> inverters and an 'AC541 line driver, which contribute additional PN.
> 
> >One thing that I have found is that at low offset frequencies the 
measured
> >PN is substantially reduced when air currents and other sources of 
thermal
> >fluctuations are reduced. Even the effect of a thin piece of paper used 
as
> >an air current shield can be easily seen.
> >With careful shielding from thermal fluctuations I measure the low
> >frequency offset PN to be substantially lower than the datasheet 
values.
> >I've seen this effect with everything for which I've measured the PN.
> 
> Agreed.  Whether or not it is explicitly stated, I take "all
> circuitry to be enclosed and protected from drafts, and allowed to
> stabilize thermally before testing" as a given with any sensitive
> time or voltage circuit.
> 
> >One problem with comparators when attempting to measure their PN is
> >that they don't have sufficient output to drive the TimePod input 
directly.
> >An amplifier is required.
> 
> The spec sheet says both TimePod inputs accept -5 to +20dBm into 50
> ohms.  -5dBm is less than 0.4Vp-p, which requires less than +/-4mA
> from the source, so a 0-5v comparator output feeding a
> capacitor and a 560 ohm series resistor should work fine as long as
> the comparator can source and sink at least 4mA.
The fly in the ointment is that with such low level inputs (the LTC6957-4 
evaluation board will deliver +4dBm into 50 ohm) the Timepod phase noise 
floor is uncomfortably close to the phase noise floor of the LTC6957.
> 
> Alternatively, a 0-5v comparator output could be buffered with three
> 'AC04 inverters in parallel, or an 'AC line driver -- but that adds s
> the PN of the gates.
> 
Not if one uses a pair of drivers one to drive the Timepod Ch0 input and 
one to drive the Timepod CH2 input.
> >A resistor from point A to ground in the Wenzel style shaper you 
attached
> >has little effect on the output symmetry due to C4.
> 
> It has just enough effect to correct the very small (<1%) asymmetry
> due to the unbalanced drive.  (With no resistor at Point A, the duty
> cycle is ~51%/49% high/low.)
> 
> >However it does allow the output amplitude to be adjusted.
> 
> According to the simulation, the resistor has no effect on the output
> amplitude until it is well below 1k ohms (at 1k ohm, the symmetry has
> been WAY overcompensated and the duty cycle is ~45%/55% high/low.
> 
Not true even 10k increases the output signal amplitude by 130mV or 
2.6%.
However that is smaller than the tilt/sag in the high level output due to 
feedthrough via Cbe of the input transistor when it is off.
> Best regards,
> 
> Charles
> 
It would perhaps be useful to measure the PN characteristics of several 
comparators and other sine to square converter circuits using a Timepod 
or equivalent.


Bruce


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