[time-nuts] Building a mains frequency monitor

[Vlad]

I just finished similar project recently. I am using OCXO 9,830400MHZ as 
the reference. My MCU driven by this crystal (No PLL). And I was using 
opto-coupler as ZCD.
At the begining I was using every crossing (which 120 times per second 
in case of 60Hz). However that design was not good. Long live to tom 
(/tvb) who did analyses of raw data I provide and gave me very valuable 
advises how to improve my project.

The main purpose of my project was to drive the Telechron clock. The 
Main measurement was added just for fun. My project has three clocks 
inside. Its RTC, driven my simple watch crystal, it is Main clock, 
driven my ZDC and it is MCU clock, driven by OCXO.

The MCU still capturing every ZDC events (120 events per second in case 
of 60Hz). But I concentrate on full cycles. Also, I implement the switch 
how often do the records to the log file. Its either every 64 ZDC events 
or once per 8192 cycles. Basically it recording the time difference 
between number of ZDC events.

The log looks like this:

# Uptime:       139 hours
# RTC time:     18:00:00
# MCU time:     18:00:00
# MAIN time:    18:00:03
# [Time Stamp]            [Period]              [1/9830400]
16-04-11 18:00:17.253 [+] 0.01665924072269      163767  -4
16-04-11 18:01:25.500 [+] 0.01666137695315      163788  -21
16-04-11 18:02:33.765 [+] 0.01666656494141      163839  -51
16-04-11 18:03:42.035 [-] 0.01666798909505      163853  -14
16-04-11 18:04:50.300 [+] 0.01666564941407      163830  +23
16-04-11 18:05:58.570 [-] 0.01666748046875      163848  -18
16-04-11 18:07:06.847 [-] 0.01666961669921      163869  -21
16-04-11 18:08:15.097 [+] 0.01666239420575      163798  +71

Time stamp, then "sign" which means if we are bellow or above the 
"ethalon", then period, then raw value of capturing timer and then delta 
between two readings.
Works great for me.

Regards,
Vlad



On 2016-04-06 21:21, Jay Grizzard wrote:
> Since it seems to be a week for new projects on time-nuts... ;)
> 
> So I've been wanting to set up a power line frequency monitor for a 
> while,
> and now(ish) seemed to be a good time for me.
> 
> So initially, I was planning on doing a simple design that was posted 
> here
> a couple of years back, which basically works out to:
> 
>   mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
> 
> I have a good 10MHz reference to feed the picPET, so this seems like it
> would make a good first shot. But, of course, I eventually want to do
> better than just a first shot. So, I have questions!
> 
> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to
> calculate: 1.0 / (timestamp2 - timestamp1)    ...but, is there a better
> way? That method just feels... naive, for some reason.
> 
> Q2: What are the sources of noise in this design? Assuming the picPET 
> is as
> accurate as my 10MHz reference is, I can think of a few potential 
> places
> that phase noise could creep into the measurements:
>   - Whatever is in the power brick beyond the transformer (I don't
> think a step down transformer alone would add phase noise, right?)
>   - The dropping resistor will slowly change the amplitude of the
> waveform (and thus the point in the cycle that the schmitt trigger
> fires) due to thermal and aging effects, if we're measuring anything
> that's not the exact zero crossing
>   - The point at which the schmitt trigger in the picPET fires will
> change over time for the same reasons. Also potentially due to picPET
> input voltage, depending on how the comparitor is built
>   - Am I missing any?
> 
> Q3: The open-ended question: How do I improve on this? I suspect the
> main place for improvement will be in the trigger, but I'm not sure
> where to go with that.  Most designs I've seen involve a schmitt
> trigger, generally with reference voltages set by things like voltage
> dividers. This seems dubious at best, to me, since that means the
> reference voltage will be affected by the same effects I'm calling out
> above. Is there a *specific* design (rather than "make a zero crossing
> detector!" or something similarly vague) that someone can point me to,
> that would minimize this kind of trigger noise?
> 
> Q3.1: Is there a better way to get mains voltage down to something I
> can work more directly with? I saw at least one design that just used
> a couple of megaohm resistors inline -- does that introduce
> appreciably less phase noise than random AC/AC power brick?
> 
> I apologize if any of this is overly basic. I've actually read
> everything I could find both in the time-nuts archives and the
> internet at large about this kind of project, but I've still found
> myself left with the questions above.
> 
> I appreciate any comments / feedback / pointers!
> 
> -j
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-- 
WBW,

V.P.