[time-nuts] PICDIV build

Bob Camp kb8tq at n1k.org
Sat Apr 16 09:09:18 EDT 2016


Hi

Just about any of the modern ‘125 or ‘126 buffer gates will do a pretty good job 
of generating a logic output:

https://www.fairchildsemi.com/datasheets/NC/NC7SZ125.pdf
https://www.fairchildsemi.com/datasheets/NC/NC7SZ126.pdf
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT125
http://www.nxp.com/products/discretes-and-logic/logic/quad-buffer-3-state:74ABT126
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf
http://www.ti.com/lit/ds/symlink/sn74lvc126a.pdf

The typical ’04 inverters also will do the job:

http://cache.nxp.com/documents/data_sheet/74AHC_AHCT1G04_Q100.pdf?pspll=1
http://www.ti.com/product/sn74ahc1g04
http://www.ti.com/product/sn74ahc1g125

The list could go on for several pages….

3.3V into 50 ohms is 66 ma. Close to the rail most gates will only put out around 
10 ma. If you want to drive close to the 3.3V level, you will need to parallel up about 
6 to 8 gates. It’s probably best to drive them all from a single high speed gate output. 
If you are picky about the levels, twice that number of gates may be needed. Since you 
are driving out of an “un-terminated source”, you can expect a bit of ring on your cable. 

If you want to deliver 3.3V into a 50 ohm load out of a 50 ohm source, you will need 
a circuit that will handle a 6.6V supply. You *might* be able to select gates that won’t 
blow up at that voltage. The current will be 2X higher so you will need a few gates. In
this case, each one gets a series resistor in it’s output to make up the 50 ohm total. 

Bob  


> On Apr 16, 2016, at 2:29 AM, Anders Wallin <anders.e.e.wallin at gmail.com> wrote:
> 
> hi all, I wrote down some notes on a recent PICDIV build and measurements:
> http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
> 
> If/when I make v2 of this board:
> - any suggestions for boosting the output amplitude of both 1PPS and 10MHz
> CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
> - any obvious mistakes that cause the phase-noise observed? Mostly I think
> 50/100Hz and harmonics would be nice to suppress..
> 
> thanks!
> Anders
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