[time-nuts] One sure way to kill your FE-5680A or FE-5650A (Hal Murray)

BIll Ezell wje at quackers.net
Thu Jun 9 12:19:45 EDT 2016

When I interviewed at a large IC mfgr in Santa Clara many years ago, one 
of the questions was basically that - how do you reliably handle startup 
state in a CPU? Of course the correct answer is, you can't with 100% 
certainty. You can make the likelihood small, but there's always some 
obscure case you never thought of. Even hysteresis, clock-count delays, 
etc. have failure modes. Say you hold the reset for 200 msecs, then 
there's a transient. Now your reset circuitry has to be designed so that 
it can reset itself, and you can't guarantee that. And yes, I've used 
the RC hack before.

They also had another trick question, how do you handle a condition 
where you have contention for a resource and one contender has higher 
priority and you want to guarantee it always gets the resource? You of 
course can't. There will always be some, possibly very small, time 
window where you have already made the allocation decision. I think it 
had something to do with multi-port memory or some such.

On 6/9/2016 12:00 PM, time-nuts-request at febo.com wrote:
> Re: One sure way to kill your FE-5680A or FE-5650A (Hal Murray)
> Startup and/or brownout has long been a nasty problem area for digital
> designers.
> In the old old days, there was typically a R/C delay on the reset pin to a
> CPU.  That screwed up when the power supply ramped up slowly enough.  Most
> old timers have that merit badge.
> Modern CPU chips often have specs like power must be OK for 200 ms before
> releasing Reset.  Anything like that will have at least one corresponding
> power monitor chip with several supply voltage inputs and the appropriate
> delay.

Bill Ezell
The day Microsoft makes something that doesn't suck
will be the day they make vacuum cleaners.
Or maybe Windows 10.

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