[time-nuts] High rate, high precision/accuracy time interval counter methods

[Attila Kinali]

On Tue, 3 May 2016 08:40:53 -0700
"Richard (Rick) Karlquist" <richard at karlquist.com> wrote:

> You also might consider that over 25 years
> ago, HP developed the 5313X counters with
> interpolators implemented in FPGA's.  The
> FPGA's available now are vastly more
> sophisticated and much faster.  Perhaps there
> is a way you do your ASIC in an FPGA.

The limit for TDCs in FPGAs seems to be around 5-20ps RMS
(which makes it more like 15-50ps in "real" precision) 
depending on type and technology. Going down to below 20ps
usually means to take the latest tech FPGA with lots of
redundant structures, which makes the whole thing quite expensive.

> If you really do need an ASIC, the best way
> to get that done is to partner with a university
> and have some PhD student design it.  Universities
> often have arrangements to do this.

Yes. That's one approach. And actually, we are currently going
that way for one of the projects I am doing. The problem with this
is that it's not exactly cheap (you need 10k at least to do anything)
and that any commercial use (like selling the chips to someone else
unless it's an academic institute again) is strictly prohibited.
Not to mention very limited availability (you get 40 pieces and that's it)

I was looking for something that can be produced more generally.
Possibly even by a dedicated hobbyist.

				Attila Kinali

-- 
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