[time-nuts] FE-5680A tuning step and pre-lock stability?

Azelio Boriani azelio.boriani at gmail.com
Sat May 7 07:26:11 EDT 2016


How can anyone of us tell wheater a tuning step is or not at the level
of 10 at -15? Maybe only TVB can...
Are you sure that the 50 times greater than is not related to your
measure instead of the real capability of the 5680A?

On Sat, May 7, 2016 at 6:51 AM, Nick Sayer via time-nuts
<time-nuts at febo.com> wrote:
> I got a second 5680 in the mail the other day and so far my firmware isn’t bricking it, so.. yay.
>
> A couple of odd things have turned up, though.
>
> 1. So far as I can experimentally tell, the tuning step on this unit is 50 times larger than the 17E-15 quoted by FEI. Either the tuning curve is not linear or the tuning range is not what they claim (or both). I’d like to get a feel for whether the standard deviation of the mid-range (near zero) tuning step is. Is it closer to what I’m observing or FEI’s spec? The answer will instruct me on how to pick the PLL gain constant for the firmware.
>
> 2. Directly clocking an AVR from the 5680A is unreliable prior to lock. I haven’t exhaustively examined the startup behavior of the 5680, but power-up reset of my GPS board used to not happen a lot of the time, and manual reset was required. The AVR datasheet says that as long as the clock frequency is kept within 2% from cycle to cycle that that’s ok, but either this 5680A isn’t doing that or the AVR datasheet is wrong. Fortunately, there’s a software workaround: fuse the controller for the internal 8 MHz oscillator and switch over (I was surprised to learn that changing system clock sources on the fly is an option) to the 5680 only once a physics lock is indicated by the lock pin. That seems to be acceptably reliable. My purpose in mentioning it is to see if anyone has examined the pre-lock behavior of the 5680 (I understand it’s not a particularly interesting question) to see exactly how jumpy it really is before it locks.
>
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