[time-nuts] High rate, high precision/accuracy time interval counter methods

[David]

In this case though we are talking about pushing the TAC resolution to
14 bits or maybe higher and that is about the level where dielectric
absorption starts to become a problem in all but the better film
capacitors.  NP0 ceramics are perhaps more than an order of magnitude
worse than the best film dielectrics.

When I have built slow sample and hold circuits in the past, I did not
have a problem with dielectric absorption in NP0 capacitors however I
also did not push the resolution so far and the hold step was a larger
issue.  For fast sample and hold circuits using diode bridges, the
sample capacitance is much smaller (or only parasitic) and resolution
was even lower so there was no problem there either.  In slow
integrating converters, NP0 ceramics are poor at best.

15 to 50 Msps and 12+ bits is an area where I have not experimented so
I just wondered if the relatively poor dielectric absorption of NP0
would limit resolution.  Testing it would be fun and low value
polyphenylene sulfide film capacitors are available as a benchmark.

I am a little dubious of getting a clean reset as well. :)  This would
be one of those places where I would consider using a bipolar
transistor with the collector and emitter reversed unless a MOSFET or
closed loop reset was better.

On Mon, 9 May 2016 07:43:19 -0400, you wrote:

>Hi
>
>Simple answer: 
>
>You are likely using an NPO cap and it’s not a big deal. 
>
>Bob
>
>> On May 8, 2016, at 9:49 PM, David <davidwhess at gmail.com> wrote:
>> 
>> How much will dielectric absorption in the capacitor affect the
>> accuracy of the result with such a high conversion rate?  I am used to
>> dealing with it on much longer time scales and higher resolutions.