[time-nuts] Commercial software defined radio for clock metrology

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat May 28 04:47:45 EDT 2016


A low pass filter will reduce the source broadband noise aliased into the ADC output signal.

Using the LVDS ADC outputs rather than the CMOS outputs may help in reducing noise generated on the board. NB the ADC performance is specified when the LVDS outputs are used.

This SDR setup appears to have a higher PN (at least 2 ADC's per signal are required  to achieve lower PN ) than a Timepod, however it appears to be better at measuring ADEV than a Timepod.
Bruce 

    On Saturday, 28 May 2016 6:02 PM, Attila Kinali <attila at kinali.ch> wrote:
 

 On Fri, 27 May 2016 18:58:35 -0700
Hal Murray <hmurray at megapathdsl.net> wrote:

> bruce.griffiths at xtra.co.nz said:
> > All the filtering and down mixing is done in the digital domain.
> > Anitialiasing filters in front of the ADCs are also be required. 
> 
> What sort of bandwidth is expected?
> 
> The usual trick with audio ADCs is to have a low cost analog filter that 
> does't have a sharp corner but lets everything you want through, sample at a 
> high rate - say 16x, run that through a digital filter with a sharp cutoff, 
> then decimate down to the desired sample rate.

The daughterboards for the USRP N210 that allow direct access to the
ADC inputs do not contain any filters. They kind of expect band limited
signals at the input.

Given that they used 10MHz signals from H-masers and used 100Msps,
I would say that the Niquist condition does hold. One might probably
increase the noise performance a little bit by using a low pass filter.

            Attila Kinali

-- 
Reading can seriously damage your ignorance.
        -- unknown
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