[time-nuts] Linux PPS clues?
gsricalde at gmail.com
Thu Oct 20 19:53:55 EDT 2016
On Fri, Oct 21, 2016 at 2:12 AM, Attila Kinali <attila at kinali.ch> wrote:
> Going for an uC is easier in that regard as they have very little interrupt
> latency (usually just 5-10 cycles), but then you have problems with
> getting the output out of the uC as their I/O subsystems are usually
> optimized to work in a stand-alone fashion.
> Maybe one way would be to use an arm9/cortex-a5 based uC (ie not an application
> processor) and use their high speed I/O.
The TI AM335x (used in the Beaglebone) has a Programmable Realtime Unit
(PRU), a 200 MHz microcontroller separate from the ARM CPU. I have used
this to decode a 192 kHz SPDIF signal (12 Mbit/s biphase mark code). The
samples are batched in the PRU SRAM, an interrupt is triggered
periodically, then a userspace program in the ARM Linux side reads the
samples from the SRAM.
The events can be timestamped by polling the PPS and event pins and
using the cycle counter. A better approach would be to use the 100 MHz
eCAP timers. The Beaglebone has two accessible eCAP pins, the PPS goes
to one and the event goes to the other. The counters can be synchronized
so the event timestamps can be referenced to the PPS timestamps.
Some PRU resources:
- Slides: http://events.linuxfoundation.org/sites/events/files/slides/Enhancing%20RT%20Capabilities%20with%20the%20PRU%20final.pdf
- The eCAP and PRU-ICSS parts of the AM335x technical reference manual
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