[time-nuts] Hints on PPS Buffer design...
cautery at montac.com
Sat Jun 17 04:15:11 EDT 2017
Trying to pin down a reasonably optimal buffer design for bringing PPS
out... I've looked at all the references, like the i3detroit.org site
Of the few schematics and devices I see, most are using a hex inverter
(1 into the other 5 paralleled with series resistors for "balance" and
setting output impedance?
Q: Why does everyone pick FIVE x 100 Ohm resistors? That's 20 Ohm out,
not counting the gate impedance on the hex inverter...
Q2: Anyone have a reference to the math for choosing the resistors for
setting a 50 Ohm nominal out INCLUDING determining and including the
gate impedance of a particular part.
(Right now, I am going to use the TI SN74AC04 Hex Inverter) I saw a
refernence in the archive referring to a 4 gate setup using a different
part needing 187 Ohm resistors... thus I can only include that I need to
use something slightly more than 250 Ohms on a 5 gate parallel setup)
Q3: It's only a 1Hz frequency, but is low inductance a desired trait of
the chosen resistors?
I'm sure there are others...
Clay Autery, KY5G
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