[time-nuts] Hints on PPS Buffer design...

Bob kb8tq kb8tq at n1k.org
Sat Jun 17 09:50:21 EDT 2017


HI

> On Jun 17, 2017, at 4:15 AM, Clay Autery <cautery at montac.com> wrote:
> 
> Trying to pin down a reasonably optimal buffer design for bringing PPS
> out...  I've looked at all the references, like the i3detroit.org site
> et al.
> 
> Of the few schematics and devices I see, most are using a hex inverter
> (1 into the other 5 paralleled with series resistors for "balance" and
> setting output impedance?

If the “output stages” are all going to switch at the same time, you want to hit their inputs
with a fast edge. As a practical point in a stand alone buffer, the invert and then invert
process keeps you out of a classic “oops” mistake. 

> 
> Q:  Why does everyone pick FIVE x 100 Ohm resistors?  That's 20 Ohm out,
> not counting the gate impedance on the hex inverter…

Not everybody does :)

It all depends on what you are trying to accomplish. If the spec from the OEM you are
building it for wants a 5V level into 50 ohms, you use a bit smaller resistor … You need
to check the spec from your customer. 

> 
> Q2:  Anyone have a reference to the math for choosing the resistors for
> setting a 50 Ohm nominal out INCLUDING determining and including the
> gate impedance of a particular part.

Gates are not spec’d for output impedance. The output stages are MOSFET’s and they
go into current limit during switching. In the full on or full off state, they are close to a 
short circuit. A good guess is that they are in the 20 to 50 ohm range. For more detail you
would have to grab a network analyzer and pick a frequency range. 


> (Right now, I am going to use the TI SN74AC04 Hex Inverter)  I saw a
> refernence in the archive referring to a 4 gate setup using a different
> part needing 187 Ohm resistors... thus I can only include that I need to
> use something slightly more than 250 Ohms on a 5 gate parallel setup)

The AC04 gates are not as high output drive as some of the others. There are gates 
designed as high(er) current buffers that likely will do better. Usually they will supply
1.5X or 2X the current of a normal gate. 

> 
> Q3: It's only a 1Hz frequency, but is low inductance a desired trait of
> the chosen resistors?

Yes, but power is the primary issue. Will you be running into a short? (again, back 
to the spec requirement). Do you need to run into a short and supply 5V (or 4V or >2.5V) 
into a 50 ohm load? Current (and thus power) can get pretty big pretty quick.


========

The much more basic set of questions revolve around what I’m calling “the spec” above.

If you need to drive 5V CMOS logic on the other end, that gives you one requirement. If
you need to drive 5V TTL on the other end, the requirement is much different. The same is
true if you have 3.3V logic of different families on the other end. There is no “one size fits all”
here. 5V logic is not a favorite anymore. The easy answer on the Rx end is to run TTL level
5V stuff if you must have 5 volts. Then it can be driven with a 3.3V source. The only “works
with everything always” solution is to drive 0 to 5V into a 50 ohm load from a 50 ohm source. 
Indeed, even that does not work with everything. The 10V p-p signal into an open circuit will
nuke a 5V gate. 

Do you need termination on *both* ends of the cable? We have gone around on this a *lot* of 
times. Terminating one end or the other is generally adequate. Terminating both ends does work
better. Terminating *neither* end is never recommended, but it can work out. If you need terminations,
do they have to be DC terminations? …hmmm….

What range of “PPS” signals will the buffer be handling? Is it’s entire life going to be spent running
a 10 us wide pulse? Might that pulse get inverted somehow? Will you ever be running a 50/50 duty
cycle signal (or 50/50 pulse per every other second …). All of this drives the numbers on the power
in your driver. 

Will you have multiple PPS outputs and are they all in sync? A great big high power driver is really
neat. It also is a great way to generate a massive spike on ground and supply. Isolating multiple 
drivers to reduce cross talk is a bit exciting when the signal goes down to DC and up to GHz. LVDS 
gets fast signals moved without a lot of power or a lot of swing. 

What will you be driving with the PPS signal? The answer of “I don’t know” is not at all uncommon. 
Stop and think about what actually uses a PPS around your lab. Counters can be adjusted to any
level and any termination. PPS inputs on digital gizmos are most likely TTL level. What else will you
be feeding? 

How far / where will your PPS signals be traveling? Driving a 5 or 10 foot cable is fine. Sending a signal to 
the next building takes a very different approach. Output isolation is generally ignored in a lab setup.
It may be a really big deal if high voltage or high power gear is involved. 

No, it’s not simple. No there is no single right way to do it. 

Bob


> 
> I'm sure there are others...
> 
> Thanks!
> 
> -- 
> ______________________
> Clay Autery, KY5G
> MONTAC Enterprises
> (318) 518-1389
> 
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