[time-nuts] Input filter for data logger

Charles Steinmetz csteinmetz at yandex.com
Mon Nov 20 00:15:44 EST 2017

Bruce wrote:

> Oops I meat to say:
> Thats a MOSFET variant of a fairly standard JFET-BJT feedback amplifier.

I think you were right the first time.  Vlad said in his first post that 
the input device is a 2N5485 (JFET).

I'm not sure why Vlad designed the input squarer that way.  If the 
FET/BJT amp feeds a 74AC gate, which Vlad said it does, the gate is 
doing all of the effective squaring.  The discrete components are just 
adding noise.  The circuit will have lower noise and jitter if the FET, 
BJT, and diodes are left out and the input signal is just cap-coupled 
into the gate, with its input biased to half-supply by a voltage divider 
from V+.  Note that with AC logic, the gate may oscillate with an open 
input and/or no signal, if the termination resistor is too large.  HC 
logic is much less prone to this.

A small improvement in the phase noise of this circuit can be made by 
filtering the gate input bias divider (well, it could be a larger 
improvement if you have noisy power rails...).  This can be easily 
accomplished by using a string of four resistors for the divider rather 
than two, and bypassing the added nodes to ground with *low-leakage* 
electrolytic capacitors (see attached diagram).

Best regards,


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