[volt-nuts] 3458A calibration

Bruce Griffiths bruce.griffiths at xtra.co.nz
Mon Aug 10 21:13:14 UTC 2009


Poul-Henning Kamp wrote:
> In message <7.0.1.0.1.20090810173047.01d8cd90 at tapko.de>, Predrag Dukic writes:
>
>   
>> How to maintain this "perfect linearity".  I read about multislope 
>> ramp conversion, but that is a solution meant to shorten the
>>     
>
>   
>> Does anyone has some 3458a AD schematics?  Service manual can't be 
>> downloaded from internet...
>>     
>
> The ADC in the HP3458A derives its linearity from a very small handful
> of components, most importantly a quite small capacitor (~120pF),
> by converting the measurement of voltage to a measurement of time.
>
>   
The April 1989 HP journal article on the 3458A states that the
integrator uses a 330pF feedback capacitor.

The effect of dielectric absorption in the integrator feedback capacitor
is kept small by using a capacitor with low dielectric absorption and by
keeping the maximum charge stored in the capacitor a small fraction of
the full scale integrator input current integration time product.

The effect of dielectric absorption can be minimised by ensuring that
the average voltage across the integrator feedback capacitor remains low
over the integration cycle.
HP/Agilent have several patents covering this aspect of DVM integrator
runup cycles.
However the runup cycle of the 3458 unlike some other HP/Agilent DVMs
doesn't appear to use this technique.
Later HP DVMs do use such techniques.

Bruce




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