SDR-1000 Phase Noise Performance

NOTE: For various reasons, these plots are not the quality I was hoping for. I hope to have a chance to rerun them sometime soon, but for now please use them ONLY as general indicators and DON'T try to read anything significant into them beyond order-of-magnitude comparisons between the three sources. In particular, please don't try to use the absolute numbers to compare the SDR-1000 to any other radio.

These are phase noise plots of the SDR-1000 DDS output, measured with the Agilent E5052A Signal Source Analyzer.

The signal was tapped off of U1, pin 6 on the TRX board. U1 is a comparator that converts the sinewave output of the DDS into a square wave to drive the quadrature sampling detector. I would have preferred to sample the sinewave directly, but its signal level was too low to drive the analyzer. The SDR-1000 frequency was set to 40.000 MHz through the software control panel (using this high frequency had some advantages for interfacing with the analyzer; I don't know if the results would change using a lower frequency).

REDUNDANT NOTE: These plots are unreliable as an indicator of system performance because:

  • (a) I was not able to get a nicely terminated signal, and there was plenty of opportunity for both reflections in the test cables to affect the results, and spurious signals to couple in. In particular, a lot of the spikes that are visible between 10kHz and 1MHz are likely not related to the DDS.

  • (b) We discovered after the fact that the Reflock-II was generating a signal that the AD9854 DDS chip wasn't happy with; in fact, it's a wonder we got any reading at all.

  • (c) These plots do not include any phase noise contribution from the clock in the sound card. That's one of the things I still want to measure.

    • With that warning in mind, here goes:

    This is a comparison of the three sources with an error in my configuration -- the jumpers on the SDR-1000 "TRX" board (SV1 and SV2) that interface the DDS input to either a single ended or a differential clock signal were not properly set (when using the internal crystal oscillator, you set them for differential input; when using an external refernece, you set for singled-ended; when I changed references, I forgot to change the settings)). I am including this plot because it actually provides better results for the external references than when the jumpers are properly set.

    The bad effect of high multiplication is clear when you look at the HP5065A results (in green). If you jump to the bottom of this page, you'll see that the 5065A by itself is pretty darn good; for example, at 1kHz it's at -145dBc, about 15dB better than the Reflock. Yet, due to the 20x multiplication, when run through the AD9854 DDS chip, it is only -113dBc at that spacing. In theory, 20x gives a 26dB degradation in phase noise. Hmmm, -145 + 26 = -119. That's not far from what we're seeing here, so I guess we've just proven the theory.

    To follow on, the Reflock-II's raw performance at 100MHz is not as good as the HP 5065A at about -130dBc, but it suffers only a 6dB theoretical hit (to -124dBc) because the signal is multiplied by 2 rather than 20. What do we see in practice? -135dBc, which is better than the Reflock by itself. Why? I don't know, but that's one of the reasons why I don't want you to put too much trust in this data...

    Here is the plot with the differential/single-ended jumpers properly set. Notice how relatively bad the Reflock-II peformance is at low offsets in this plot. That's a result of the mismatch between the 100MHz VCXO and the AD9854 input discussed above.

    For comparison, here are plots showing the HP5065A and Reflock-II, each with and without the input jumpers properly set. You'll see that the HP5065A isn't much affected, while the Reflock-II is. The 5065A drive at 10MHz is apparently solid enough that it clocks the chip properly regardless of the jumper settings (though the "wrong" jumper settings yield slightly better results even here).

    And, for good measure, here is the raw performance of the HP5065A and Reflock-II (measured directly at the oscillator output, not through the SDR-1000).