[time-nuts] Digital PLL ICs, alternatives and digital loop filters

[SAIDJACK at aol.com]

Sorry Stephan, 
 
forgot to mention, the loop filter thermal instability is so small and  slow 
compared to the feedback loop that it will be completely compensated out by  
the PLL phase comparator.
 
Since you are disciplining an OCXO, you probably want to set the loop  filter 
bandwidth to less than 1Hz, so the crystal determines the stability and  
phase noise above 1Hz (usually the crystals' phase noise cannot be beat by the  
PLL). In simplification, the OCXO is "free" running above 1Hz, and tightly  
controled by the reference crystal below 1Hz through the PLL.
 
If you are disciplining an analog SAW VCO etc, you definately want to set  
the PLL loop bandwidth to between 5KHz to 100KHz so the PLL can actually remove  
the phase noise of the VCO by tightly locking it to your reference crystal -  
since the VCO will have a much larger phase noise at low frequency than the  
PLL/ref-crystal combination.
 
The simulation tools on Analog's website will show you exactly what  
stability, lock time, and phase noise to expect with different loop filter  parameters.
 
bye,
Said