[time-nuts] Interface boards for timing peripherals

Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Apr 15 21:28:08 EDT 2008

John Miles wrote:
>> Reflock II is not bad, but I am sure we could spin a board that work even
>> better for  general time-nut nuttiness(*) without a lot of difficulty.
> Has anyone tried out one of the Digilent Nexys-2 boards?
> http://snurl.com/nexys2 (product page)
> http://digilentinc.com/Data/Products/NEXYS/Nexys_rm.pdf (ref manual)
> I don't see how they can make much money selling these for $99, when most
> other vendors selling Spartan3E+Cypress FX2 dev boards (fpga4fun, Opal
> Kelly, etc.) charge 3x as much for significantly less hardware.  Or, to
> phrase it differently, I don't see how the other board vendors are competing
> with Digilent.
> This looks like a good platform for custom high-speed acquisition and timing
> work, and they even give you a C library to program it.  You can move 20+
> megabytes/second in and out of your PC with one of these puppies.
> -- john, KE5FX

Looked at this, but it didnt have Ethernet or a big enough FPGA for the 
next project - a controller for a 24" telescope replacing an obsolete 
ISA bus PC and stepper indexer/translator plus software with a hardware 
implementation of the control algorithm and everything else other than 
higher level functions, operator interface and comms functions. Elected 
to use the Spartan 3E starter kit instead. I need to interface to a 
network, a GPS receiver and various encoders limit switches etc. This 
board includes a 14 bit dual channel simultaneous sampling LT1407A-1 
ADC. Unfortunately the slow analog circuity added between the ADC and 
the pins precludes using it to sample a quadrature pair of 10MHz 
sinewaves. Will just use it to measure the settings of a couple of pots 
in a handheld control box.

Something like this would be good for prototyping ideas such as the 
various high resolution time interval counter or time stamp device 
It would also be useful for quickly prototyping even such simple ideas 
as the single flipflop PPS phase error detector method of discipling an 


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