[time-nuts] Frequency divider design critique request

Bruce Griffiths bruce.griffiths at xtra.co.nz
Fri Jul 11 20:11:03 EDT 2008

Magnus Danielson wrote:
> Why not? It basically solves a problem most of us has, and only a few tweaks
> away and it solves it fairly generically. The only think it doesn't do well is
> handling 5 MHz souces rather than 10 MHz. Having that would solve many
> problems. While not achieving full metrological levels of stability, I am sure
> it could be handy for several time-nuts never the less. Only a few need that
> upper level anyway. A good prooven design for enought stability and decent
> money might be right. I would certainly not mind having a pair of those lying
> around and I am sure I could put a few into continous use. Now that is my lab
> alone...

A minimalist approach for the 5MHz to 10MHz doubler could use a full 
wave (diode, BJT or JFET) doubler followed by a series tuned 5MHz shunt 
trap to minimise the 5MHz content in the output.
If the doubler components were perfectly matched (unlikely) the 
fundamental trap could be omitted.
The other harmonics are of little concern as the comparator output is a 
square wave and the rectified sinewave waveform would produce a duty 
cycle of around 44% at the comparator output.
The diode turn on threshold will alter the duty cycle somewhat but it 
should still be acceptable at least for clocking the flipflops and dividers.

If desired a threshold feedback loop could be used to stabilise the 
comparator duty cycle at 50%.
However such a duty cycle stabiliser only works when the input signal 
waveform is sinusoidal, rectified sinewave or any other signal with a 
slow enough slew rate.


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