[time-nuts] Phase noise and jitter
John Miles
jmiles at pop.net
Mon Oct 13 19:15:14 UTC 2008
Javier Serrano wrote:
> Dear nuts,
>
> I would like to know if there is a clear explanation somewhere with
> considerations on how to choose an upper frequency limit when
> integrating phase noise to find jitter. Let's say I'm interested in
> the raw jitter measurement which comes from integrating phase noise
> without applying any filter to it. For a given application, I can
> easily understand that I can define a lower integration limit if the
> time spans I'm interested in are shorter than some value. For
> example, we run a synchrotron with a
> 1.2 second
> cycle time. Phase noise in our clocks below say 0.1 Hz should be of no
> concern since it is "common mode" to all the triggers we define
> within any given cycle using counts of the clock we are
> characterizing (incidentally I am also interested in your comments on
> how a phase noise measurement would fare against Allan deviation in
> this frequency area). I have a bit more trouble with the upper
> frequency limit. Am I right in saying that
> the right
> answer in principle is to integrate to infinity but due to
> Physics the phase
> noise will at some offset fmax be so low that the contribution of
> integrating from fmax to infinity would be negligible? How can I then
> work out experimentally which is the value of this fmax? Maybe
> extrapolating the
> slope of the curve I measure using for example a low bandwidth PLL
> technique? Thanks for any insight.
Normally the PN reaches a broadband floor determined by the circuit's own
limitations or its semiconductor process. This happens between 100 kHz and
10 MHz depending on what's generating the signal. So you wouldn't want to
extrapolate the slope indefinitely.
A high-quality crystal oscillator's broadband floor will be sufficiently
quiet (typically better than -160 dBc/Hz) that it won't matter much whether
you integrate out to 100 kHz or to 1 MHz. The difference will be on the
order of attoseconds. When making the measurement, you'd typically place
the upper integration cursor one decade into the broadband-floor region, and
call it good.
There will normally be several regions of the curve beyond the bandwidth of
the PLL used for measurement locking (e.g., page 7 of
http://www.ke5fx.com/Scherer_Art_of_PN_measurement.pdf . With a crystal
oscillator in particular, the crystal's properties are responsible for the
earlier decades while the circuit's properties normally dominate the later
regions including the broadband floor. So you'd want to ensure that your
maximum measurement offset is high enough to account for all regions of the
noise profile. 1 MHz to 10 MHz is usually sufficient, and you'll still get
reasonable results in many cases if you stop at 100 kHz.
-- john, KE5FX
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