[time-nuts] Updated Divider Jitter Results

Poul-Henning Kamp phk at phk.freebsd.dk
Sat Apr 4 07:08:39 UTC 2009

In message <49D68734.3020900 at febo.com>, John Ackermann N8UR writes:

>A single 10 MHz source was daisy-chained to the TADD-2 input, to the 
>5370B external reference input,

Can you do the test again running the 5370B on a different clock or
free-running ?

Running synchronized clocks like you do makes the calibration of
the input circuits in the 5370B very very critical for the measured

Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
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