[time-nuts] Updated Divider Jitter Results
John Ackermann N8UR
jra at febo.com
Sat Apr 4 11:13:21 UTC 2009
Sure. I didn't write down the numbers because it was an interim step,
but I earlier did that and IIRC the std dev was around 20-25 ps.
Would error in the cal circuit tend to falsely increase, or decrease,
the result? Or both?
Poul-Henning Kamp said the following on 04/04/2009 03:08 AM:
> In message <49D68734.3020900 at febo.com>, John Ackermann N8UR writes:
>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the
>> 5370B external reference input,
> Can you do the test again running the 5370B on a different clock or
> free-running ?
> Running synchronized clocks like you do makes the calibration of
> the input circuits in the 5370B very very critical for the measured
More information about the time-nuts