[time-nuts] OT: Verilog/VHDL discussion list created...

Scott Newell newell at cei.net
Tue Apr 14 17:36:14 UTC 2009


At 12:29 PM 4/14/2009 , John Miles wrote:
>... for those who would like to participate in HDL discussions that aren't
>on-topic for existing lists:
>
>http://groups.yahoo.com/group/HDLTalk
>
>Any VHDL or Verilog HDL-related topics are welcome.

How will this compare to comp.lang.verilog, comp.lang.vhdl, and
comp.arch.fpga?

-- 
newell  N5TNL




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