[time-nuts] OT: Verilog/VHDL discussion list created...
cupido at mail.ua.pt
Tue Apr 14 17:40:33 UTC 2009
I believe it is to be ham or hobby oriented
Am I right ?
(If so some rewording of the list purpose
might be adequate... thinking out loud...)
Scott Newell wrote:
> At 12:29 PM 4/14/2009 , John Miles wrote:
>> ... for those who would like to participate in HDL discussions that aren't
>> on-topic for existing lists:
>> Any VHDL or Verilog HDL-related topics are welcome.
> How will this compare to comp.lang.verilog, comp.lang.vhdl, and
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