[time-nuts] fast freq. synthesis schemes
Bob Camp
lists at cq.nu
Wed Oct 14 21:05:49 UTC 2009
Hi
For that matter, drive a microwave VCO with a couple high speed dac's.
Calibrate the tuning curve as best you can and run an "open loop" synth.
Appropriately summing a couple of 16 bit parts could give you KHz level
"steps". You can also dress it up a bit by running a pair of VCO's with one
in "calibrate" while the other is "in use".
A lot of this depends on just what the end application requires....
Bob
-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
Behalf Of Magnus Danielson
Sent: Wednesday, October 14, 2009 4:48 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] fast freq. synthesis schemes
Bob Camp wrote:
> Hi
>
> At least on paper you can run a DDS at VHF/UHF and put it into a (very)
> wideband PLL driving a 12-18 GHz VCO.
>
> As mentioned previously - spurs will be an issue. You also will need to
get
> a hold of some DDS chips with GHz-ish clock rates.
One could use a suitably high frequency VCO or even YIG, locked to a DDS
and then use a suitable fixed oscillator for up-conversion. The PLL
locking would also use a DAC for VCO "bias" being updated at the same
time as the DDS. A look-up-table could be used for top DDS frequency to
bias conversion and a calibration round could be used to trim the table
up to minimize the bias-error. That way the VCO can be quick-jumped and
the PLL will immediatly steer the frequency back into lock. The PLL loop
thus only needs to handle error in bias-table, the remaining difference
in frequency and phase-relationship. Quite a different task than the
overall lock-range. An ADC for the non-biased value of the loop-filtered
detector would enable calibrations to be made automatic.
Cheers,
Magnus
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