[time-nuts] Small CPLD/FPGA for microcontroller replacement

Bob Camp lists at cq.nu
Fri Feb 5 22:51:31 UTC 2010


Hi

I believe you will find a state machine compiler in the web version of Quartus. I know it's there in the full version. It has some nice features if you are after a provably "fail safe" machine.  

There is also a simple version of the NIOS processor available that may fit into the larger CPLD's. It and a reasonable set of peripherals would definitely fit into a set of chips.  I'm not sure exactly what the authorities wold make of a micro controller made within a CPLD. I know what I would think, but their's is indeed the only opinion that matters.  

Bob

 
On Feb 5, 2010, at 5:18 PM, Didier Juges wrote:

> I am not trying to replace the exact functionality of a processor with something else, but simply in general terms for those cases where a processor is not a practical solution, I would like to be able to use a small CPLD or FPGA to obtain similar equivalent functionality, which is that of a power supply monitor/remote controller.
> 
> I would not consider ladder logic an adequate substitute, at least for the level of complexity that we normally require (I am replacing a ladder logic controller with a processor in another project, so I know in that case the functionality gap). There is a state machine at the core, but a great many peripheral functions.
> 
> I checked the Actel parts suggested earlier, and they look promising.
> 
> Didier
> 
> ------------------------ Sent from my BlackBerry Wireless thingy while I do other things... 
> 
> -----Original Message-----
> From: paul swed <paulswedb at gmail.com>
> Date: Fri, 5 Feb 2010 09:14:32 
> To: Discussion of precise time and frequency measurement<time-nuts at febo.com>
> Subject: Re: [time-nuts] Small CPLD/FPGA for microcontroller replacement
> 
> Didier that is indeed a tall order.
> But at least since the system already exists you have the established
> requirements in hand.
> So my question is (And I am uneducated in DO-254) is a state machine okay?
> Because it sounds like thats what you are forced into. If true then its much
> more like the traditional relay logic ladder type of solution. Which has
> been pretty good for the railroads for 100 years.
> Other comment is perhaps this particular thread rapidly goes offline to
> respect others.
> 
> On Fri, Feb 5, 2010 at 9:04 AM, Didier Juges <didier at cox.net> wrote:
> 
>> It looks like I will have to get educated on CPLD/FPGAs on short notice.
>> 
>> My application at the moment will be the replacement of small
>> microcontrollers for military and commercial aviation projects that do not
>> want/tolerate software/firmware (some customers and government regulations
>> do not consider CPLD/FPGA to be containing software, which to a large
>> extent
>> is a matter of opinion, but this is not a thread I wish to start at this
>> time). The FAA in particular puts a much greater burden on microcontrollers
>> than CPLD/FPGAs when it comes to demonstrating compliance to DO-254 in
>> safety critical applications like battery charging.
>> 
>> The microcontrollers I have been using are typically from 20 to 100 pins
>> (Silabs 8051 family) with a lot of integrated peripherals. I understand I
>> will have to use external peripherals like ADC, DAC, probably clock
>> oscillator and such with a CPLD/FPGA, where these functions are currently
>> integrated in my microcontrollers.
>> 
>> Part of the requirement is that the devices be immune (as much as
>> practical)
>> from SEU malfunction. I was told Atmel (or Actel?) makes flash-based small
>> FPGAs that may fit the bill. Most SRAM devices are deemed to be excessively
>> sensitive to SEU, even though I cannot imagine how a CPLD/FPGA could be
>> made
>> that does not use SRAM at all. Maybe it's a matter of quantity? A few
>> working registers may be an acceptable risk, but the entire device
>> operating
>> from SRAM is not acceptable?
>> 
>> I am looking for any information/recommendation on which families to look
>> into.
>> 
>> Thanks in advance,
>> 
>> Didier KO4BB
>> 
>> -----Original Message-----
>> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
>> Behalf Of John Miles
>> Sent: Thursday, February 04, 2010 8:43 PM
>> To: Discussion of precise time and frequency measurement
>> Subject: Re: [time-nuts] CPLDs for clock dividers
>> 
>> Yeah, Xilinx 11 is pretty nice.  I'm usually allergic to IDEs, especially
>> theirs, but I've been pretty happy with 11 so far.  I find myself using it
>> instead of my tried-and-true makefile for FPGA work, and that's saying
>> something.
>> 
>> -- john, KE5FX
>> 
>> 
>> _______________________________________________
>> time-nuts mailing list -- time-nuts at febo.com
>> To unsubscribe, go to
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
>> 
> _______________________________________________
> time-nuts mailing list -- time-nuts at febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
> _______________________________________________
> time-nuts mailing list -- time-nuts at febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
> 




More information about the time-nuts mailing list