[time-nuts] Small CPLD/FPGA for microcontroller replacement

Bob Camp lists at cq.nu
Fri Feb 5 17:19:22 UTC 2010


The Max II is the current Altera CPLD family.


There are some older families like the MAX3000 still running around at some
level of production. For a new design of the complexity you are looking at,
go with the latest and greatest. 

You are going to use a lot of gates, and the newer parts have much larger
gate populations than the older ones. The biggest part in the series has
2210 LE's or 1700 Macro cells. Think of them both as a couple of super gates
+ flip flop(s) that can do a useful function. Done the easy way, a 24 bit
modulo N counter will use 24 LE's. 

It's likely you will run out of gates before you run out of pins. The bigger
parts come in 256 / 324 pin packages. You may be able to implement crude
D/A's with unused pins and R/2R resistor arrays. Maybe not cheap, but it
might help you on reliability. 

The MAX II's all have 8K bits (1K bytes) of user accessible flash memory.
It's a nice for things like calibration data and embedded serial numbers. 

For the master clock, the first thing to check would be a system clock
signal that's already running around. Just about anything in the 1 to 200
MHz range could be useful. If the application is simple enough, the chips do
have an accessible onboard R/C oscillator. It's spec'd as 3.5 to 5.5 MHz and
you can't tune it. Better than nothing though.

You should be able to do everything you need to do with the web download
tools. There are a few small things they leave out. Altera support is pretty
good. We are out in the middle of nowhere and they drop by every few months.

I'm absolutely certain that Xilinx has similar parts that also work well. We
are an Altera shop, so I'll let somebody else chime in there. 


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