[time-nuts] Small CPLD/FPGA for microcontroller replacement

[Predrag Dukic]

You do not have to use external adcs/dacs.

It is possible to construct sigma-delta adc/dac all within  the 
cpld/fpga fabric.

xilinx xapp154.pdf is one example   (or 153/155 I don't remember exactly).

also there exist so called antifuse CPLDs/FPGAs that REALLY do not 
contain any sware,

and the programming information is hard-wired.  No eprom cells, no 
registers/sram cells

containing config data at all.

Some oscillators can be also integrated (synthesized) , but those are 
RC, You probably need quarz osc.


Predrag Dukic





At 15:04 5.2.2010, you wrote:
>It looks like I will have to get educated on CPLD/FPGAs on short notice.
>
>My application at the moment will be the replacement of small
>microcontrollers for military and commercial aviation projects that do not
>want/tolerate software/firmware (some customers and government regulations
>do not consider CPLD/FPGA to be containing software, which to a large extent
>is a matter of opinion, but this is not a thread I wish to start at this
>time). The FAA in particular puts a much greater burden on microcontrollers
>than CPLD/FPGAs when it comes to demonstrating compliance to DO-254 in
>safety critical applications like battery charging.
>
>The microcontrollers I have been using are typically from 20 to 100 pins
>(Silabs 8051 family) with a lot of integrated peripherals. I understand I
>will have to use external peripherals like ADC, DAC, probably clock
>oscillator and such with a CPLD/FPGA, where these functions are currently
>integrated in my microcontrollers.
>
>Part of the requirement is that the devices be immune (as much as practical)
>from SEU malfunction. I was told Atmel (or Actel?) makes flash-based small
>FPGAs that may fit the bill. Most SRAM devices are deemed to be excessively
>sensitive to SEU, even though I cannot imagine how a CPLD/FPGA could be made
>that does not use SRAM at all. Maybe it's a matter of quantity? A few
>working registers may be an acceptable risk, but the entire device operating
>from SRAM is not acceptable?
>
>I am looking for any information/recommendation on which families to look
>into.
>
>Thanks in advance,
>
>Didier KO4BB
>
>-----Original Message-----
>From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
>Behalf Of John Miles
>Sent: Thursday, February 04, 2010 8:43 PM
>To: Discussion of precise time and frequency measurement
>Subject: Re: [time-nuts] CPLDs for clock dividers
>
>Yeah, Xilinx 11 is pretty nice.  I'm usually allergic to IDEs, especially
>theirs, but I've been pretty happy with 11 so far.  I find myself using it
>instead of my tried-and-true makefile for FPGA work, and that's saying
>something.
>
>-- john, KE5FX
>
>
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