[time-nuts] power spectrum of hard limiter output

ehydra ehydra at arcor.de
Sat Jan 29 20:48:02 UTC 2011


Hi Magnus -

Well. I made homework for sure. Endless viewed websites what others had 
done.
We all seek for the singularity of beauty in our art. At the moment this 
is a CD4007 or similar without AGC. Cheap, effective. Not oversized. I 
came from TCA440. One of the not many receiver chips where the IF is at 
one output reachable. Then I found I must increase carrier frequency 
beyound 30MHz. So the integrated mixer entered useless. I used an 
external device. Next I found that the integrated IF-strip is not one of 
the quiets... Remembering several statements about using CMOS inverters 
in s.e.d. for analog reasons, the way was clear...

Implementing an AGC makes the design much more complicated. Can 
oscillate etc.

Going without AGC seems a reasonable way if the modulation is one of the 
phase modulation systems where amplitude is not very important.

Then look how big is the dynamic range of a simple CMOS inverter.

Meanwhile I found two examples made by others. So the way looks not to 
idiotic ;-)

- Henry


Magnus Danielson schrieb:
>> I find it more and more curious a working concept not to find in the
>> I-net. I'm looking several weeks. Maybe wrong keywords.
> 
> Well, have you considered what an AGC might do for you?
> It has been the traditional way of reducing the effect of signal level 
> on phase-detector gain and hence on the loop gain. The hard-limiter text 
> is to be seen in this context where the SNR steers the compression 
> factor, i.e. change of loop gain.
> 
> Cheers,
> Magnus



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