[time-nuts] 8560E DC Coupling phase noise measurements
Loic.MOREAU at eai.fr
Tue Oct 25 20:00:41 UTC 2011
In the process of measuring phase noise with a 'demphano' gear, I am a bit reluctant to connect my 8560E in DC mode to get 30 Hz low frequency sensitivity: the SA input is very sensitive to DC voltage and may be destroyed by a voltage larger than 200mV.
So with a LNA having no blocking DC output I would like to know the best way to protect the SA.
I suppose that putting a 100µF capacitor between LNA and SA is not especially a good idea as a charged capacitor to DC rail may have the same effect that no caps at all.
I am looking for some advice in that domain to pursue phase noise measurements, for now I connect the SA with a caution after PLL lock and measuring the SA input with a DC voltmeter before switching to DC SA input but this mode of operation is a bit frightening.
Any idea ?
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