[time-nuts] GPS SDR (was: FE-.5680A trimming resolution)

Peter Monta pmonta at gmail.com
Wed Feb 1 19:49:51 UTC 2012

> I think, a specialized GPS SDR can be build for less than 500 USD
> in low (a dozen at max) volumes.

The USRP works for GPS L1 (though P/Y is a little undersampled at 8
Ms/s complex), but I didn't find a way to acquire both L1 and L2
simultaneously at useful sample rates (maybe current USRP hardware is
better).  Also 16 or 8 bits is too much precision---2 bits is more
appropriate and for some reason wasn't a standard option.  It was fun
to acquire and track L1 and L2C separately, but what I really want is
a no-holds-barred geodetic reference receiver.

A dedicated tri-band GPS front end could be built for less than $500,
I agree.  Software can handle acquisition, tracking, and conversion to
RINEX.  The hardware just needs to translate RF to bits on the wire
(gigabit Ethernet say) and be phase-stable over temperature.

One possible inexpensive design:

- RF input passively split three ways, with LC filters for the three
channels:  L5/E5, L2, and L1/E1/Glonass
- For each channel, a downconverter (Maxim MAX2121) feeding a ~65 Ms/s
ADC (e.g. MAX19505)
- A low-cost FPGA (e.g. Spartan-6) that quantizes the channels to 2
bits, does AGC, assembles Ethernet packets
- Ethernet PHY, power (PoE?), etc.

For a timing receiver, one could inexpensively add one more ADC that
samples a 10 MHz input signal and a 1PPS input signal.  1PPS packets
would be emitted only when transitions are detected, and the 10 MHz
signal could be downconverted to a low-bandwidth signal to be sent
over Ethernet with the others.  This way one has reference signals
coherently sampled with the GPS signals.

I think LC filters would provide enough protection against strong
out-of-band interferers; semicustom ceramic-resonator filters or,
worse, full-custom SAW filters are not hobbyist-friendly and may not
be as stable over temp.  Also I think the phase noise of the MAX2121
is acceptable.  Possibly the FPGA should be doing the pulse blanking
for L5 since the FPGA still has the 8-bit signal available.

Is there a publically-available antenna design that's easy to
fabricate, has a stable phase center, covers 1100--1600 MHz, and has a
good pattern over this band with low cross-polarization?  Even a large
choke-ring design would be okay if it's fully specified.


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