[time-nuts] PLL behavior

[Jim Lux]

On 9/19/12 4:38 AM, Bob Camp wrote:
> Hi
>
> Commonly this sort of thing is done with a sample and hold in the loop. No reference in / put the loop voltage in hold. You still have a phase drift and need to cope with the phase offset when the reference comes back.
>

or, in our case, we run the loop, but don't have any error signal input 
(if you have a second or third order loop, you might as well essentially 
predict what is going on)