[time-nuts] PLL behavior

Magnus Danielson magnus at rubidium.dyndns.org
Thu Sep 20 00:19:26 UTC 2012


On 09/20/2012 01:55 AM, Jim Lux wrote:
> On 9/19/12 4:38 AM, Bob Camp wrote:
>> Hi
>>
>> Commonly this sort of thing is done with a sample and hold in the
>> loop. No reference in / put the loop voltage in hold. You still have a
>> phase drift and need to cope with the phase offset when the reference
>> comes back.
>>
>
> or, in our case, we run the loop, but don't have any error signal input
> (if you have a second or third order loop, you might as well essentially
> predict what is going on)

The phase drift you get repeatedly should integrate up to a frequency 
correction. If you want to get fancy, you could separate it and do a 
hold-over drift correction such that a secondary integrator compensates 
for hold-over drift. Not too hard to do. That was you could reduce the 
blurp. Unless you have a very unstable system, it should behave 
relatively linear to the amplitude of things, and this on/off pattern 
will be more of a 0.5 Hz noise signal in the loop.

Cheers,
Magnus



More information about the time-nuts mailing list