[time-nuts] Fw: New to list and GPSDO questions

Richard H McCorkle mccorkle at ptialaska.net
Thu Jun 13 18:51:14 EDT 2013

Hi Bob,

The VE2ZAZ controller is a frequency locked loop that keeps the source
on frequency but over time the phase drifts, as past corrections are
not compensated for. When the system is stable every 16 seconds the
16-bit counter rolls over 2441 times with an extra 26624 counts (6800
HEX). The previous count is subtracted from the current count, the
difference from 6800 HEX is used to update the EFC to correct the
frequency, and the current count is stored as the previous count for
the next sample. When the current difference is not exactly 6800 HEX
then a phase shift of 6.25ns has occurred over the sample period for
each count of the difference from 6800 HEX. The EFC corrects the
frequency to give the proper 6800 HEX over the following samples, but
the phase shift from the previous error during the correction period
  If you add a little code to provide a correction history you can
add phase correction to the VE2ZAZ controller as well. Once lock is
established store the sample count as a phase reference count. Add
6800 HEX to the reference count every update and store the result as
the next reference value. Use the difference between the current and
previous samples from 6800 HEX to coarse correct the frequency as
currently done, but add the difference between the current count and
reference count to the EFC correction as a fine phase correction. If
hold or unlock occurs disable the phase correction routine until lock
is re-established. Then store a new reference and restart the phase
correction process. By updating the reference every update it provides
a phase history so the accumulated count error over time can be
removed and the phase of the source can be stabilized.


> Atilla,
> Isn't the VE2ZAZ circuit functionally equivalent to your example 3?  Granted, he's
> not picking the 10 millionth transition and checking its phase
> difference to the reference, but I've only got a 1PPS reference with a
> 1uS or so jitter from pulse to pulse.  Bert is averaging over 16
> seconds, and creating a PWM signal to drive an integrator (simulating a DAC), which
> will drive a Trimble 34310-T.  And like I mentioned
> earlier, I just like the way Bert did it.  It has a kind of elegance
> that appeals to my inner hacker.  =)
> Bob - AE6RV
> ----- Original Message -----
>> From: Attila Kinali <attila at kinali.ch>
>> To: Bob Stewart <bob at evoria.net>; Discussion of precise time and frequency
>> measurement <time-nuts at febo.com>
>> Cc:
>> Sent: Thursday, June 13, 2013 3:39 PM
>> Subject: Re: [time-nuts] New to list and GPSDO questions
> snip
>> [3] Describes how to use a clock
>  synchronizer to build a GPSDO. Probably
>> not the easiest and not the cheapest way, but definitly one with a very
>> low parts count.
> snip
>> [3] The AD9548 as a GPS Disciplined Stratum 2 Clock, by Gentile, 2009
>> http://www.analog.com/static/imported-files/application_notes/AN-1002.pdf
> _______________________________________________
> time-nuts mailing list -- time-nuts at febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.

More information about the time-nuts mailing list