[time-nuts] Time tagging fpga
kb8tq at n1k.org
Sat Nov 22 08:22:02 EST 2014
Does the FPGA directly put out something that Time Lab understands?
> On Nov 21, 2014, at 10:37 PM, Robert Darby <bobdarby at triad.rr.com> wrote:
> I finally got the time tagging fpga I was playing with to a semi-usable state. I mentioned in an earlier post
That post seems to have gone astray before it got here
> that I was unable to compile or link the FTDI library but Magnus Karlsson very kindly rewrote a program of his to provide me with a utility to set up the USB asynchronous parallel interface characteristics on the PC. Only bad thing is you're running blind so it pays to do a short run to make sure all's well before committing to a long capture.
Which suggests that you are running some sort of shim program on the PC (thus the first question).
> I just finished a trial run using the Riley DMTD with three devices. I have a rather shaky 5065A, an Austron 1250 and an FTS 1050. The attached trace shows the 5065 misbehaving about half way through the run, the FTS displaying a periodic oscillation and the Austron just doing it's thing. It's nothing earth shattering but it sure is nice having the third clock to sort out who's being naughty or nice. I kinda suspect the FTS oscillation is related to the battery charging cycle; back in 2013 TVB mentioned he'd had problems with the FTS battery charging affecting the outputs. Anything specific to look at aside from replacing all the usual capacitor suspects?
> Bob Darby
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