[time-nuts] LTE-Lite module

SAIDJACK at aol.com SAIDJACK at aol.com
Fri Oct 17 21:10:01 EDT 2014

Jim, et. al.,
I spent some time today and put together a Divide-by-2 circuit. Attached  
are the schematics, I will send some photos in additional mails so we don't  
overload the mail system.
Some comments:
* I grab the 3.0V from capacitor C6 on the eval board. That is the  
low-noise filtered analog supply. By loading it with the FF, that voltage goes  
down to 2.86V.. Using the digital 3.3V supply resulted in excessive spurs.
* I used only two additional components: a cap and a series resistor
* The IC I used was an old Fairchild 74LVX74 SO-14 chip I had laying  around
* Notice the nice improvement in phase noise, and the absence of any  
measurable spurs
* Notice the nice 6dB phase noise improvement compared to using the direct  
outptut, even the floor improved to close to my reference noise floor, so 
theory  meets practice
* I spent less than 45 minutes building this on a small copper-clad board,  
using the ground of the board as much as possible
* The output power of the 74LVC74 driving the 50 Ohms input impedance of  
the analyzer is pretty low, less than 7dBm, so a nice buffer would help
* Notice how I set the Q output of the unused FF to 0V, and then connect  
that pin to ground to use it as an additional ground pin
* While I wired up the 3.0V power to the eval board, I did not even bother  
wiring up the ground. I simply used the coax cables as DC ground return
* The LTE-Lite board was powered from a Thinkpad PC via USB cable, and  
disciplining to GPS so I did not even use an external low-noise isolated 5V lab 
 supply or anything like that, just the noise PC's USB port.
In a message dated 10/17/2014 11:32:49 Pacific Daylight Time,  
SAIDJACK at aol.com writes:

Hello Jim, 
let me answer through Time Nuts as this may interest  other parties as 
Yes, using a fast flip flop to generate 10MHz out  of the 20MHz TCXO 3.0V 
CMOS output from the LTE-Lite module will preserve the  phase noise (actually 
improve it by up to 6dB due to the 20log(n/m) noise  improvement) and will 
not add any spurs if you use the clean 3.0V output from  the LTE-Lite module 
or an external clean power supply (please note the  LTE-Lite TCXO RF output 
is 3.0V due to the internal 3.3V to 3.0V Low Noise  regulator feeding the 
TCXO and buffer). 
Use fast logic such as 74AC74, 74FCT74, or the  like. We do exactly that on 
our ULN-2550 boards to generate 50MHz and 25MHz  out of the 100MHz, and 
using a fast CMOS divider will result in additive  phase noise that will be 
below the crystal oscillator phase noise  floor. 
That will result in significantly better phase noise  and much lower spurs 
than using the synthesized 10MHz output from the board,  and one 74' chip 
can generate both 10MHz and 5MHz out of the 20MHz LTE-Lite  output. This is 
exactly what we would do here if we needed a clean 10MHz from  the 20MHz 
LTE-Lite board. 
I believe you can order low-noise divide-by-2  blue-top boxes from Wenzel 
already packaged-up and connectorized as  well. 
Hope that helps,
Hi Said 
I was one of those looking for 10Mhz but I just thought  again now that it 
might be just as well to divide the standard 20Mhz output by  2 using a FF. 
I think that would preserve all the desirable characteristics of  the 20Mhz 
signal which I understand to just be square wave at CMOS 3.3v  levels 
anyway. Is that correct? 

-------------- next part --------------
A non-text attachment was scrubbed...
Name: 74LVX74_connections.jpg
Type: image/jpeg
Size: 95212 bytes
Desc: not available
URL: <http://www.febo.com/pipermail/time-nuts/attachments/20141017/e648e359/attachment-0001.jpg>

More information about the time-nuts mailing list