[time-nuts] Commercial software defined radio for clock metrology

Sherman, Jeffrey A. (Fed) jeff.sherman at nist.gov
Tue May 31 16:45:00 EDT 2016


Bob Camp:
> In many DMTD (and single mixer) systems, a lowpass and high pass filter are applied to the signal coming out of the mixer. 
> This is done to improve the zero crossing detection. It also effectively reduces the “pre detection” bandwidth. My understanding
> of the setup in your paper does not do this sort of filtering. It simply operated directly on the downconverter signal.  Is this correct? 
> I may have missed something really obvious in a quick read of the paper…..

Yes. After the filtering and down-conversion in the FPGA, we applied no further filtering in software (except in very long data runs we averaged the phase in 1 second "chunks" of samples before recording). ADC zero offset (or slow fluctuations) is removed with a high-pass filter implemented in the FPGA. Following down-conversion, a series of decimating low-pass filters in hardware reduces the data rate (typically by a factor of ~100) and the bandwidth. Both of these have the same effect of reducing the "pre-detection" bandwidth with the trade-offs of a) reducing the noise bandwidth (but not the noise density floor), and b) reducing the data throughput.

Best wishes,
-js


More information about the time-nuts mailing list