[time-nuts] time/sampling behavior of RTL-SDR
bg at lysator.liu.se
Tue Mar 7 18:50:32 EST 2017
Did you look at the below article?
Sent from my smartphone.
-------- Original message --------From: jimlux <jimlux at earthlink.net> Date: 07/03/2017 22:08 (GMT+01:00) To: Discussion of precise time and frequency measurement <time-nuts at febo.com> Subject: [time-nuts] time/sampling behavior of RTL-SDR
Has anyone ever looked at the timing consistency/behavior of the cheap
That is, if you feed a sine wave in and get the samples out via the USB
interface, are there missing samples? What's the ADC clock look like?
If you had two of them, and you determine the relative phase of them at
some time t0, and you let it run for minutes, how far will it have moved?
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